From: andres-mancera <andres-mancera@users.noreply.github.com>
Date: Mon, 1 Jun 2015 21:38:55 +0000 (-0700)
Subject: Cleaning-up some of the comments that had been previously added.
X-Git-Url: https://source.dussan.org/?a=commitdiff_plain;h=refs%2Fpull%2F1484%2Fhead;p=gitignore.git

Cleaning-up some of the comments that had been previously added.
---

diff --git a/Global/SynopsysVCS.gitignore b/Global/SynopsysVCS.gitignore
index 82ffb5be..eed2432f 100644
--- a/Global/SynopsysVCS.gitignore
+++ b/Global/SynopsysVCS.gitignore
@@ -1,57 +1,36 @@
-########## Waveforms #######################################
-# Value Change Dumping (VCD) - IEEE Standard
+# Waveform formats
 *.vcd
-# VCDlus Dumping (VPD) - Synopsys proprietary format
 *.vpd
-# Extended VCD (EVCD) - Dump only port information
 *.evcd
-# Fast Signal DataBase (FSDB)
 *.fsdb
 
-
-########## Simulation executable file ######################
-# Default name of the simulation executable.  A different
-# name can be specified with this switch (the associated
-# daidir database name is also taken from here)
-#   -o <path>/<filename>
+# Default name of the simulation executable.  A different name can be 
+# specified with this switch (the associated daidir database name is 
+# also taken from here):  -o <path>/<filename>
 simv
 
-
-########## Intermediate files used for simulation ##########
-# Generated for Verilog top configs
+# Generated for Verilog and VHDL top configs
 simv.daidir/
-# Generated for VHDL top configs
 simv.db.dir/
-# Infrastructure necessary to co-simulate SystemC models
-# with Verilog/VHDL models.  An alternate directory may
-# be specified with this switch:
-#   -Mdir=<directory_path>
-csrc/
 
+# Infrastructure necessary to co-simulate SystemC models with 
+# Verilog/VHDL models.  An alternate directory may be specified with this
+# switch:  -Mdir=<directory_path>
+csrc/
 
-########### Log files ######################################
-# The switch below allows to specify the file that will be
-# used to write all messages from simulation
-#   -l <filename>
+# Log file - the following switch allows to specify the file that will be
+# used to write all messages from simulation:  -l <filename>
 *.log
 
-
-########## Coverage-related files ##########################
-# Generation of coverage result reports is done with urg
-# and the database location is specified with this switch:
-#   urg -dir <coverage_directory>.vdb
+# Coverage results (generated with urg) and database location.  The 
+# following switch can also be used:  urg -dir <coverage_directory>.vdb
 simv.vdb/
 urgReport/
 
-
-########## DVE, UCLI related files #########################
-# DVE produces some logs that are created in this directory.
+# DVE and UCLI related files.
 DVEfiles/
 ucli.key
 
-
-########## C Language interface ############################
-# When the design is elaborated for DirectC, VCS will create
-# a file in the current directory with declarations for 
-# C/C++ functions.
+# When the design is elaborated for DirectC, the following file is created
+# with declarations for C/C++ functions.
 vc_hdrs.h